60408 ms 20080423-s00009 no.a1241-1/6 http://onsemi.com semiconductor components industries, llc, 2013 august, 2013 LV5744V overview the LV5744V is a 2-channel step-down switching regulator. features ? provides dual switching regulator cont rol circuits integrated on the chip. ? output-stage push-pull structure enabling high efficient operation. ? provides power supply (v cc -5v) for protecting the external p channel mos gate. ? built-in timer latch type scp (short-circuit protection circuit) ? built-in uvlo (low voltage malfunction prevention circuit) ? built-in reference voltage circuit ? max_on_duty is adjustable. specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc max 35 v output voltage v o max 33 v allowable power dissipation pd max mounted on a specified board * 0.74 w operating temperature topr -40 to +85 c storage temperature tstg -55 to +150 c allowable pin voltage 1 ct, non1, non2, inv1, inv2, fb1, fb2, dt1, dt2, scp, vref 7v 2 v cc -5v 30 v 3 gnd, out1, out2, v cc 35 v * : specified board : 114.3 76.1 1.6mm 3 , glass epoxy board bi-cmos lsi 2-channel step-down switching regulator orderin g numbe r : ena1241 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
LV5744V no.a1241-2/6 allowable operating ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage v cc 8 to 33 v error amplifier input voltage v in 0 to 3.3 v timing capacitance c ct 50 to 5000 pf oscillation frequency f ct 20k to 1m hz electrical characteristics at ta = 25c, v cc = 12v ratings parameter symbol conditions min typ max unit reference voltage block output voltage vref iref = 1ma 2.4948 2.520 2.5452 v input stability v dli v cc = 8 to 33v 1 10 mv load stability v dlo iref = 0 to 5ma 1 10 mv v in -5v supply voltage v n5 i out = -5ma v cc -5.5 v cc -5.0 v cc -4.5 v triangular wave oscillator block oscillation frequency f osc c ct = 220pf 320 400 480 khz frequency fluctuation f dv v cc = 8 to 33v 1 % protection circuit block threshold voltage v it 1.5 1.7 1.9 v standby voltage v stb 50 100 mv latch voltage v lt 30 100 mv source current i scp 1.6 2.1 2.6 a comparator threshold voltage v ct 1.4 1.5 1.6 v quiescent time adjust ment circuit block vt0 duty cycle = 0% 0.45 0.5 0.55 v input threshold voltage (fosc = 20khz) vt100 duty cycle = 100% 0.95 1.0 1.05 v input bias current i bdt dt1, dt2 = 0v 0.1 1 a low voltage malfunction prevention circuit block threshold voltage v ut 6.5 7 7.5 v error amplifier input offset voltage v io 6mv input offset current i io 30 na input bias current i ib 15 100 na open gain av 85 db common mode input voltage range v om v cc = 8 to 33v 0 3.3 v common mode rejection ratio cmrr 80 db maximum output voltage v oh 2.6 v minimum output voltage v ol 0.2 0.4 v output sink current i oi fb = 1.25v 1 ma output source current i oo fb = 1.25v 85 a pwm comparator vt0 duty cycle = 0% 0.45 0.5 0.55 v input threshold voltage (fosc = 20khz) vt100 duty cycle = 100% 0.95 1.0 1.05 v output block output stage on resistance (upper) r onh 7 output stage on resistance (lower) r onl 2 overall device characteristics standby current i ccs when output is off 10 ma
LV5744V no.a1241-3/6 package dimensions unit : mm (typ) 3178b pin assignment sanyo : ssop16(225mil) 5.2 4.4 6.4 0.22 0.65 (0.33) 18 9 16 0.5 0.15 1.5max 0.1 (1.3) pd max -- ta 0 0.7 0.6 0.4 0.5 0.2 0.3 0.1 0.9 0.8 -20 8085 60 20 40 0 100 0.74 0.38 -40 ambient temperature, ta -- c allowable power dissipation, pd max -- w specified board : 114.3 76.1 1.6mm 3 glass epoxy lv5744 1 ct 2 gnd 3 non1 4 inv1 5 fb1 6 dt1 7 out1 top view 8 v cc -5v 16 vref 15 scp 14 non2 13 inv2 12 fb2 11 dt2 10 out2 9v cc
LV5744V no.a1241-4/6 pin function pin no. pin name description 1 ct external timing capacitor connection pin 2 gnd ground 3 non1 error amplifier 1 input (+) 4 inv1 error amplifier 1 input (-) 5 fb1 error amplifier 1 output 6 dt1 output 1 maximum duty setting 7 out1 output 1 8 v cc -5v power supply for output stage drive 9 v cc power supply 10 out2 output 2 11 dt2 output 2 maximum duty setting 12 fb2 error amplifier 2 input (+) 13 inv2 error amplifier 2 input (-) 14 non2 error amplifier 2 output 15 scp timer latch setting 16 vref reference voltage output block diagram v cc vref vref scp comp triangle oscillator err amp1 vref non1 inv1 out1 fb1 scp + + - + - ct dt1 + + - err amp2 non2 inv2 out2 fb2 + - + + - regulator pwm comp1 pwm comp2 reference voltage timer latch s r uvlo r dt2 gnd v cc -5v
LV5744V no.a1241-5/6 timing chart * the voltage at the non pin is {vref/(r1+1k)} 1k in uvlo mode. v cc vreg uvlo release voltage uvlo signal esd 1k non vref r1 r2 c1 non v out
LV5744V ps no.a1241-6/6 application circuit example r22 r21 c21 LV5744V f1 r20 r19 c20 1 2 3 4 5 6 7 15 14 13 12 11 10 8 16 vref scp non2 inv2 fb2 dt2 out2 v cc ct c1 c2 r4 r2 r1 r7 r8 r6 r5 c3 c4 c5 r3 gnd non1 inv1 fb1 dt1 out1 v cc-5v 9 c7 r11 r9 r10 r14 r16 r18 r22 q2 l2 r15 r13 c8 c9 c10 c18 c19 d2 c6 r12 c11 c12 c14 c15 r17 sgnd q1 l1 c16 c17 d1 c13 v cc pgnd on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.
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